Circuits fabricated as laminates (either printed circuit boards or thin-film stacks on semiconductor substrates) often include connective conductors formed from one or more patterned conductive layers. The conductors may carry signals, provide power, or act as ground or other reference lines. (In this document, “ground” will serve as a generic shorthand for any reference conductor). Conductors with different functions may be fabricated on different layers; the “signal plane,” the “power plane,” and the “ground plane” may sometimes be separate from each other. Alternatively, combinations of signal lines, power lines, and ground lines may be coplanar or formed in the same layer. Signal-carrying conductors may be single lines, differential pairs such as microstrip, or single or paired lines with coplanar parallel ground lines such as coplanar waveguides. Ground planes may be unpatterned conductive layers as in some printed circuit boards (PCBs).
Two ongoing trends in electronics manufacturing are (1) higher data rate, e.g., fabric or Peripheral Component Interconnect Express (PCIe) applications and (2) higher component density, which entails a corresponding increase in the density of signal lines and other interconnects. As data rates increase, the signaling performance degrades due to the frequency dependent loss of the presently used copper conductors and surrounding dielectrics. Thus, it becomes more and more important to control and reduce the dielectric loss in high speed digital system designs. This is particularly critical for longer routing lengths in PCB or package. The dielectric loss becomes a dominant factor in high speed signaling since it dominates the total loss for frequency in GHz range. Through producing air-filled trenches along the conductor traces, the dielectric loss can be significantly reduced. Because air is lossless (dielectric constant=1, loss tangent=0), the total dielectric loss caused by the mixed medium (dielectric+air) surrounding the trace is reduced. Other approaches have included, without limitation, using a thicker layer of copper for the signal plane to reduce the conductor loss; using special low-loss dielectric as the substrate or as the fill layer around the signal conductors; or adding another conductive plane. All these add significant extra production cost, and/or are not effective in reducing the total PCB channel loss. For example, when there are only a few (e.g., the longest and thinnest) signal traces that do not easily meet the loss target, using a more expensive material or design throughout the entire package may not be cost-effective.
A need exists for a cost-effective solution to overcome the difficulty of meeting link loss targets and to improve the signal integrity performance of PCB microstrips. The present disclosure addresses these needs.